This topic explains how to show the internals of a bus tie in a horizontal orientation on an SLD.
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In the Electrical Index create your PDB including the Bus Tie coupler-riser relations with their circuit internals.
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From the Electrical Engineer, select the circuit with the Bus Tie coupler-riser that you want to create an SLD for, and select File > New > SLD. Alternately, you can right-click on the circuit, and then select New SLD.
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From the Electrical Index, select the PDB that contains the bus tie coupler-riser that you want to create an SLD for, and select Actions > Generate SLD for PDB
. Alternately, you can right-click the PDB, and then select Generate SLD.
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On the Single Line Diagram Options dialog, select the Circuits and Internals tab, and do the following:
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Select the options you require.
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Set the distance between the circuit internals and the circuits, remembering to make the spacing wide enough so that the circuit items will not be crowded onto each other, and require moving manually.
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Select the Buses tab and select the required options.
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Select the required options from the other tabs.
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Select Generate.
For you to see the Bus Tie and its internal circuit you must use the correct symbols.
The Coupler circuit symbol, CircuitBusTieCoupler.sym and the Riser circuit symbol,
CircuitBusTieRiser.sym. Any of the symbols used in the internal circuits must use
the syntax <itemtype>BusTie.sym, for example CircuitbreakerBusTie.sym.